Adtractor

To implement subtraction, one takes the one's compliment of number you want negative.  Then you add the two numbers together as normal.  This of course means that your representation is ones compliment and anything with the high bit set is negative.

To construct this, one needs to first make some IC's to make a 32bit compliment.  We do this by making an 8bit compliment and then group 4 of these to make a 32 bit compliment.

Finally, we can make an adtractor by adding a signal to choose the normal input or, a compliment for subtraction of the chosen input.  Note, adtractor is not an standard word for this.  It is normally called a adder-subtractor, but I like adtractor better.

One quick note.  When there is a choice of two outputs to an given single input, we need a special gate to disable the logical output of inputs we are not interested in.  If one were high and another connected that was low, the result is indeterminate.  The solution is a tri-state gate that, when desired, will pass the signal through.  Otherwise the output is High-Z (floating, tri-state) and does not affect the result of other connected gates to the input.  More on this later.

Here is the 8bit compliment:

And here is a 32 bit compliment composed of 4 - 8bit compliments.

Now that we have the compliment, we can make the adtractor.  Here it is:

You'll notice the addend coming in (middle input line) and going straight to the 32bit adder.  Below is the addend or possibly subtracthend.  We convert to the 32bit compliment and then pass both values to the IC named "32bit choose".  This selects one of the inputs to pass through depending on the mode flag.  This is the top value coming in and chooses the mode, addition or subtraction.  Let's see how this 32bit chooser is implemented.

   

 Here we have two 32 bits values coming in on the left.  Each is broken into 4 8it bytes and divided up to these IC's named "2 byte selector".  The 2 byte selectors get the "select in" signal and then output to be recombined to the final 32 bit value.  I don't really like the name "2 byte selector", maybe "byte selector" would be better.  The select signal chooses which of two input bytes is passed out.

Now on to the "2 byte selector"...

Here we see the use of tri-state gates.  The value of Select In determines which of the tri-state's are allowed to pass their value through to the final output.  You can see the NOT gate above the "b In" group that inverts the selection value.  Only the values of the group with a logical 1 values will allow the values to pass through.  Otherwise they are High-Z and have no influence on what they are connected to.  Without this, were one to output both high and low to the same input, the result is indeterminate.  Might they cancel?  Might it cause a short circuit?  Are there specific types of hardware that behave in specific ways?  If anyone knows, leave a comment.  I certainly don't, this is just a theoretical exercise to me.

So, returning to the adtractor you can see the compliment and chooser in action again and see how they work together to make a normal adder perform subtraction.