Below is a 1 bit full adder I made. If you are unsure what a full adder does, you can read up on it on wikipedia. http://en.wikipedia.org/wiki/Adder_%28electronics%29
This is certainly over-complicated and not optimized. The route to optimize it would be to either write out the boolean equations for this (or just come up with them from a truth table) and then simply the expression into fewer gates. Looking on wikipedia from the link above, I just noticed how inefficient this is. But my implementation will only have a few of these, so as long as it functions properly, I'm not interested in this point in optimizing.
After that is a stack of 8 of them wired up to make an 8 bit IC. And then after that, 4 of those to make a 32bit adder. 32bit addition is needed for TEA, so this is one of the foundational ICs.
The mathematical operations TEA needs are (all 32 bit):
- addition
- subtraction (for decryption)
- left bit-shift (by 4 bits)
- right bit-shift (by 5 bits)
- XOR
1 bit full adder (highly unoptimized) |
8 bit full adder |
32 bit full adder |
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